Do we still need DMB on in-order pipeline such as CA7 processor
Posted 15 October 2012 - 01:00 PM
Since CA7 is in-order pipeline and there is no instructions ordering problem in CA7, Do we still need DMB on in-order pipeline such as CA7 processor?
For device memory, I think we should map non-cached and for cache maintenance we should use DSB. In which case the DMB should be used on in-order pipeline series?
Posted 15 October 2012 - 05:26 PM