Hi,
I am using pandaboard with Cortex-A9MP (2x Cortex-A9) and connect to processor_0 by JTAG and Lauterbach hardware debugger.
I wanted to know wether the hardware has a GICv1 or GICv2. According to the GIC Architecture dokumentation the information is stored
in the Peripheral ID2 Register, which lies at offset 0xFE8 in relation to the GIC Base Address, and i found the information there.
The Cortex-A9MP GIC dokumentation however shows that at offset 0xFE8 would be Peripheral ID6 Register, and ID2 Register at offset 0xFD8.
Is that a mistake in the dokumentation? I implemented a datastructure that has wrong offsets for the ID Registers if the information is wrong.
Greets
Sebastian
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