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ARM Community: Zynq 7000 - AXI bus incomplete transaction. - ARM Community

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Zynq 7000 - AXI bus incomplete transaction. does an unresponsive axi transaction have to hang the system. Rate Topic: ****- 1 Votes

#1 User is offline   Ralph Bellofatto 

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Posted 09 May 2012 - 10:30 PM

We are working on a system using the Zynq 7000 series SOC systems and we have noticed that if we attempt to access an AXI address space where the AXI slave device never responds the system appears to hang.

I see from reading the AXI protocol specification that ALL transactions must complete.

Is there some sort of system / processor setting to have an AXI transaction abort and produce an interrupt or machine check if a slave device connected to an AXI interconnect fails to respond??
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#2 User is offline   isogen74 

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Posted 09 May 2012 - 11:00 PM

Not really, it would make designs phenomenally complex as well as a need to abort the transaction in the bus itself. The design of memory protocols generally assumes the slaves respond or are at least responsive enough to return a slave error.
When optimizing software, consider that the quickest code to run is the bit you removed from the call path.
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