Cortex R4F Block Diagram
Posted 13 April 2012 - 02:48 PM
I am just doing some general research on the Cortex R4F, as I am using the TI version (TMS570) for one of my classes. I had a question about the block diagram of the R4F. What exactly is the difference between the modules that are enclosed in a solid line (Core, VIC Port, ETM Interface, etc.) and the modules that have a dashed line around them (FPU, Memory Protection Unit, Data Cache). I have inserted the picture below. Thank you in advance for the insight.
Posted 13 April 2012 - 03:03 PM
The difference is between what MUST be there and what is OPTIONAL.
For instance the ARM Cortex-R4F processor has the Floating Point Unit whereas the ARM Cortex-R4 processor doesn't.
However, they would both generally be referred to ARM Cortex-R4 processor.
The diagram you linked is from ARM. ARM Partners, like Texas Instruments you mention, who implement our technology decide which optional elements they want to use.
Am I being clear?