Strange issue with inter-processor interrupts on Cortex a9
Posted 07 December 2011 - 03:38 PM
There is a strange problem when I try to send IPI. When I send interrupts from core 0 to either core 0 or core 1 it can send them many times (I am able to get them at the target core). But when I try to send interrupts from core 1 to either core 0 or core 1 I can only send them once. After that I cannot send any interrupts from the core 1. The GIC is configured in the same way for both cores. I acknoledge interrupts on both cores. So there shouldn't be any problems with that. Can you give a hint about what can be wrong there?
Posted 08 December 2011 - 11:17 AM
I have tried to read the ICDISPR register before and after sending an IPI interrupt. When I send it first time the register is 0 before and after sending. When I send the same interrupt again the register is 0 before sending but remains 2 all the time after I have sent the interrupt. So question is why is it pending when I send it the second time? What can possibly cause this issue? Is there a way how to force the pending interrupt to get delivered from the pending state? I have tried to clear the pending state by writing in ICDICPR but it didn't help.
This post has been edited by SJS: 08 December 2011 - 11:30 AM