Hi,
I'm trying to understand the AHB protocol spec Rev 2.0.
In pg # 39/230, under bullet 3.3 its mentioned that "Address cannot be
extended but the data can be extended by controlling HREADY signal".
But contrary to above statement, in pg # 42/230, fig 3-5, the diagram extends
the address line for the transaction "c".
I'm confused, not sure which one is correct?
And also do you have any easy and clear material in understanding these bus's (AHB/AXI).
Thanks,
/Sachin
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Address buss externtion
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ttfn 
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Posted 22 July 2011 - 08:44 AM
This is kind of down to semantics....
You can't extend the address phase, but you can extend the data phase. In the diagram, it is the data phase of B that is being extended, not the address phase of C.
This might seem pretty meaningless, but... What it's really saying is that a master cannot choose to extend its address phase (there's no signal is drive high or low to say its not ready yet). If the phase gets extended it is only as a side effect of the data phase of the previous transaction (
being extended.
You can't extend the address phase, but you can extend the data phase. In the diagram, it is the data phase of B that is being extended, not the address phase of C.
This might seem pretty meaningless, but... What it's really saying is that a master cannot choose to extend its address phase (there's no signal is drive high or low to say its not ready yet). If the phase gets extended it is only as a side effect of the data phase of the previous transaction (
being extended.
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