One question about the address space when implemented the Security Extensions of ARMv7-A architecture
Posted 06 July 2011 - 08:06 AM
In ARMv7-A architecture, When implemented, the Security Extensions provide two physical address spaces, a Secure physical address space and a Non-secure physical address space. We also know that 32-bit physical address provides 4GB address space. If we use 32-bit physical address, does the secure physical address space and the non-secure physical address space share the same 4GB address space? Or they both have a separated 4GB address space?
Anyone know it? Thanks.
Posted 06 July 2011 - 09:22 AM
The secure processor modes can see all 8GB of the physical address space, because the MMU pages contain a single bit which allows the secure world to select a non-secure physical address or a secure physical address for each virtual address currently mapped.
However the bus implementation the processor is attached to may choose to only allow a single physical address space, and use the "NS" bit on the bus to provide access control to each physical address rather than another "virtual address bit". I believe this is what most implementers have chosen to do, so you typically have a global 4GB address space and the non-secure processor can only see a subset of it.