ARM7TDMI - Exceptions
Posted 02 June 2011 - 10:25 AM
I have a doubt in ARM7TDMI exception,
Once exception (FIQ, IRQ, or Data Abort, Pre-fetch Abort) occured, then regardless of the previouse mode (ARM or THUMB) the lr value will be as follows
FIQ -> PC+4 , where PC is the next instruction to be executed after return frm exception
IRQ -> PC+4, where PC is the next instruction to be executed after return frm exception
Data Abrt -> PC+8, where PC is the instruction which got aborted
PreFetch -> PC + 4 , where where PC is the prefetched instruction.
Why this is same for both ARM and Thumb mode?
Can anyone explain?
Posted 02 June 2011 - 02:09 PM
It makes writing exception handlers which don't care about the ARM/Thumb state of the interrupt code very easy.