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ARM Community: ARM7TDMI - Exceptions - ARM Community

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ARM7TDMI - Exceptions Rate Topic: -----

#1 User is offline   junaid 

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Posted 02 June 2011 - 10:25 AM

Hi All,
I have a doubt in ARM7TDMI exception,

Once exception (FIQ, IRQ, or Data Abort, Pre-fetch Abort) occured, then regardless of the previouse mode (ARM or THUMB) the lr value will be as follows
FIQ -> PC+4 , where PC is the next instruction to be executed after return frm exception
IRQ -> PC+4, where PC is the next instruction to be executed after return frm exception
Data Abrt -> PC+8, where PC is the instruction which got aborted
PreFetch -> PC + 4 , where where PC is the prefetched instruction.
Why this is same for both ARM and Thumb mode?
Can anyone explain?
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#2 User is offline   isogen74 

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Posted 02 June 2011 - 02:09 PM

"Magic" =)

It makes writing exception handlers which don't care about the ARM/Thumb state of the interrupt code very easy.
When optimizing software, consider that the quickest code to run is the bit you removed from the call path.
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#3 User is offline   ttfn 

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Posted 02 June 2011 - 02:46 PM

It's just legacy. These numbers came from how early harms dealt with exceptions. The numbers are maintained for backwards compatibility.
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