Trustzones: switching between secure/normal worlds
Posted 10 August 2010 - 01:40 AM
I'm implementing a software component running in monitor mode for switching between secure and normal worlds. To isolate both worlds I have to ensure that the processor state of each world is properly preserved and restored upon switch, and for that I need to have access to all the core registers of the processor, including the banked registers.
My question is: while running in the monitor mode, how can address the banked registers of all the other privileged modes (svc, abort, undef, irq, fiq) for read/write (e.g., SP_svc, LR_svc, SPSR_svc)? I think it's possible to access the User banked registers using the caret modifier (e.g., 'STM sp, <register list>^'), but I couldn't find an answer regarding the other modes.
I'd really appreciate some help on this.